Audited 05 Aug 2026·Last updated 15 Sept 2026·3 citations·Tier 2·0 uses

Linear Feedback Shift Register Calculator

LFSR calculator: step a linear feedback shift register — XOR the tap bits, shift right, insert the feedback bit — and see exactly how the next state forms.

Linear Feedback Shift Register Calculator

Next unsigned register
5
Primary result from the named standard variant.
Feedback bit
0

Background.

A linear feedback shift register is the cheapest pseudo-randomness hardware can buy: a row of bits that shifts one place each clock tick, with the vacated position filled by the XOR of a few chosen ‘tap’ bits. From a handful of gates comes a sequence that looks noise-like, repeats only after up to 2ⁿ−1 steps for an n-bit register with well-chosen taps, and can be reproduced exactly by anyone who knows the taps and the starting state.

That mix of chaos and reproducibility put LFSRs everywhere: CRC error-checking in Ethernet and ZIP files, scramblers and spreading codes in GPS, Bluetooth and mobile standards, built-in self-test pattern generators on chips, white-noise voices in classic sound hardware (the drum sounds of 8-bit consoles are LFSR noise), and stream ciphers — including, infamously, ones broken precisely because LFSRs are linear.

This page executes one step so you can watch the mechanism rather than take it on faith: give it the current register value, the tap mask (a bit set in the mask means that bit position feeds the XOR), and the register width, and it returns the feedback bit and the next state. In the right-shift (Galois-style output, Fibonacci-tap) convention used here, the tapped bits are XORed together, every bit moves one place toward the low end, the old low bit falls off, and the feedback enters at the top.

Single-stepping is deliberately the whole scope: it is how you debug a software LFSR against hardware, verify a textbook example, or trace a short cycle by hand. Choosing maximal-period tap sets, polynomial notation, and whole-sequence generation sit outside the page, as the scope note says — though the FAQs point at them.

What is linear feedback shift register calculator?

A linear feedback shift register (LFSR) is a register of n bits whose next state is produced by shifting all bits one position and inserting, at the vacated end, a feedback bit computed as the XOR of selected ‘tap’ positions of the current state. Because XOR is linear over the two-element field, the whole state sequence is linear algebra in disguise — predictable to anyone with the recipe, statistically noise-like to anyone without it. With taps chosen from a primitive polynomial, an n-bit LFSR visits all 2ⁿ−1 nonzero states before repeating; the all-zero state is a fixed point it must avoid.

How to use this calculator.

  1. Enter the current register value as an unsigned integer — 11 means bit pattern 1011 in a 4-bit register.
  2. Enter the tap mask, also as an integer: each set bit marks a position that feeds the XOR (mask 3 = 0011 taps bits 0 and 1).
  3. Set the register width (2–16 bits here); it defines which position the feedback bit enters (the top bit) and where bits fall off (the bottom).
  4. Read the feedback bit and next state; feed the next state back in repeatedly to trace a cycle by hand and measure its period.
  5. Avoid the all-zero register with XOR feedback — it maps to itself forever — and if your cycle is short, your mask is not a maximal-period tap set for that width (try the classic ones: 0b1100 for 4 bits, 0b10110100 for 8).

The formula.

feedback = XOR of selected tap bits; shift right and insert feedback at the high bit

One step is three operations. Feedback: AND the register with the tap mask to isolate the tapped bits, then XOR them together — equivalently, the parity of (register AND mask) — yielding one bit. Shift: move the register right one place, discarding bit 0. Insert: place the feedback bit at position n−1. Linearity is the load-bearing property: XOR is addition modulo 2, so each state is a linear function of the previous one, and the whole evolution is multiplication by a fixed matrix over GF(2). That is why the tap mask corresponds to a polynomial — the register's characteristic polynomial — and why period analysis reduces to algebra: the sequence attains the maximal period 2ⁿ−1 exactly when that polynomial is primitive. The same linearity is the cryptographic weakness: observing 2n output bits lets the Berlekamp–Massey algorithm solve for the taps and state, which is why raw LFSRs scramble and self-test but never encrypt on their own. The engine performs the mask, parity, shift, and insert on exact integers, with range checks on width and inputs.

A worked example.

Example

Take a 4-bit register holding 11 — bit pattern 1011 — with tap mask 3 (0011: taps at bit positions 0 and 1). Feedback first: the tapped bits are bit 0 = 1 and bit 1 = 1, and their XOR is 1 ⊕ 1 = 0 — the feedback bit for this step. Now shift right: 1011 loses its low bit (the 1 at position 0 falls off) and slides to 0101. Insert the feedback at the top — position 3 — which here writes a 0 onto a bit that is already 0, leaving 0101 = 5. Next state: 5, feedback bit: 0, matching the engine outputs exactly. Run the mechanism one more tick to feel the rhythm: from 0101, taps read bit 0 = 1, bit 1 = 0, feedback 1 ⊕ 0 = 1; shift gives 0010, inserting 1 at the top makes 1010 = 10. Continue and the walk 11 → 5 → 10 → … unfolds — with mask 3 it closes after fewer than the maximal 15 states, which is the hands-on way to discover that 0011 is not a maximal tap set for width 4, while the classic 1100 (taps 3 and 2) visits all fifteen nonzero states before repeating.

bit Width4
tap Mask3
register11

Frequently asked questions.

What do the taps do, and how does the mask encode them?
Taps are the bit positions whose values are XORed to form the feedback bit — the register's ‘recipe’. The mask encodes them positionally: mask 3 = 0011 taps bits 0 and 1; mask 12 = 1100 taps bits 3 and 2. Everything interesting about an LFSR — its period, its output statistics, its equivalent polynomial — is determined by which taps you pick, which is why tap tables for each width are published and reused rather than chosen casually.
Why does a well-chosen LFSR have period 2ⁿ−1 and not 2ⁿ?
The all-zero state is a trap: with XOR feedback, zero taps XOR to zero, so 000…0 shifts to itself forever. Every other state can, with the right taps, lie on one grand cycle through all 2ⁿ−1 nonzero states — achieved exactly when the tap polynomial is primitive over GF(2). A 4-bit maximal LFSR cycles through 15 states; a 32-bit one through about 4.3 billion. Poor taps fracture the state space into several shorter cycles instead, which is what the worked example's mask 3 exhibits at width 4.
Where are LFSRs used in practice?
Anywhere cheap, fast, reproducible bit streams are wanted: CRC checksums (a CRC is an LFSR consuming message bits), data scramblers and whiteners in Ethernet, PCIe, Bluetooth and DVB, spreading-code generators for GPS gold codes and CDMA, built-in self-test (BIST) pattern generation and signature analysis on silicon, and retro sound chips' noise channels. The common thread is that reproducibility matters as much as randomness — the receiver or checker runs the same register and expects the same stream.
Are LFSRs cryptographically secure?
Not alone — emphatically. Linearity is fatal: from just 2n consecutive output bits, the Berlekamp–Massey algorithm recovers an n-bit LFSR's taps and state, and the entire past and future of the stream follows. Historical ciphers that leaned on barely-hardened LFSRs (GSM's A5/1, Bluetooth's E0, DVD's CSS) were all publicly broken. Modern designs either avoid LFSRs or wrap them in nonlinear machinery (Trivium, Grain, SNOW descend from this tradition); the LFSR supplies statistics, the nonlinearity supplies secrecy.
What is the difference between Fibonacci and Galois LFSR forms?
Where the XOR happens. Fibonacci form (the convention this page steps) gathers several tap bits into one XOR that feeds the input end — conceptually simple, matches textbook diagrams. Galois form instead XORs the single output bit into multiple positions during the shift — fewer gate delays in hardware and faster in software, since one bit fans out rather than many fanning in. The two are equivalent: for every Fibonacci register there is a Galois register (with the reversed/reciprocal tap polynomial) producing the same output sequence, so tables and periods transfer between forms.

How this page was produced

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Quanta Calculator
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3 cited below
Method
feedback = XOR of selected tap bits; shift right and insert feedback at the high bit
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